nds35 6a p general description features ___________________________________________________________________ _____________ absolute maximum ratings t a = 25c unless otherwise noted symbol parameter nds356a p units v dss drain-source voltage -30 v v gss gate-source voltage - continuous 20 v i d maximum drain current - continuous (note 1a ) 1.1 a - pulsed 10 p d maximum power dissipation (note 1a ) 0.5 w (note 1 b) 0.46 t j ,t stg operating and storage temperature range -55 to 150 c thermal characteristics r q ja thermal resistance, junction-to-ambient (note 1a) 250 c/w r q jc thermal resistance, junction-to-case (note 1) 75 c/w supersot tm -3 p -c hannel logic level enhancement mode power field effect transistors are produced using fairchild's proprietary, high cell density, dmos technology. this very high density process is especially tailored to minimize on-state resistance. these devices are particularly suited for low voltage applications such as notebook computer power management, portable electronics, and other battery powered circuits where fast high-side switching, and low in-line power loss are needed in a very small outline surface mount package. -1.1 a, -30 v, ?r ds(on ) = 0.3 w @ v gs =- 4.5 v r ds(on ) = 0.2 w @ v gs =- 10 v. industry standard outline sot-23 surface mount package using proprietary supersot tm -3 design for superior thermal and electrical capabilities. high density cell design for extremely low r ds(on) . exceptional on-resistance and maximum dc current capability. d s g 4008-318-123 sales@twtysemi.com http://www.twtysemi.com 1 of 3 smd type smd type smd type smd type smd type smd type smd type smd type smd type smd type product specification
electrical characteristics (t a = 25c unless otherwise noted) symbol parameter conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = -250 a -30 v i dss zero gate voltage drain current v ds = -24 v, v gs = 0 v -1 a t j =55 c -10 a i gssf gate - body leakage, forward v gs = 20 v, v ds = 0 v 100 na i gssr gate - body leakage, reverse v gs = -20 v, v ds = 0 v -100 na on characteristics (note 2) v gs (th) gate threshold voltage v ds = v gs , i d = -250 a -0.8 -1.6 -2.5 v t j =125c -0.5 -1.3 -2.2 r ds(on) static drain-source on-resistance v gs = -4.5 v, i d = -1.1 a 0.25 0.3 w t j =125c 0.35 0.4 v gs = -10 v, i d = -1.3 a 0.14 0.2 i d(on) on-state drain current v gs = -4.5 v, v ds = -5 v -3 a g fs forward transconductance v ds = -5 v, i d = -1.1 a 2 s dynamic characteristics c iss input capacitance v ds = -10 v, v gs = 0 v, f = 1.0 mhz 280 pf c oss output capacitance 170 pf c rss reverse transfer capacitance 65 pf switching ch aracteristics (note 2 ) t d(on) turn - on delay time v dd = -10 v, i d = -1 a, v gs = -10 v, r gen = 50 w 8 15 ns t r turn - on rise time 17 30 ns t d(off) turn - off delay time 53 90 ns t f turn - off fall time 38 80 ns q g total gate charge v ds = -10 v, i d = -1.1 a, v gs = -5 v 3.4 4.4 nc q gs gate-source charge 0.7 nc q gd gate-drain charge 1.5 nc 4008-318-123 sales@twtysemi.com http://www.twtysemi.com 2 of 3 nds35 6a p smd type smd type smd type smd type smd type smd type smd type smd type smd type smd type product specification
electrical characteristics (t a = 25c unless otherwise noted) symbol parameter conditions min typ max units drain-source diode characteristics and maximum ratings i s maximum continuous source current -0.42 a i sm maximum pulsed drain-source diode forward current -10 a v sd drain-source diode forward voltage v gs = 0 v, i s = -0.42 (note 2 ) -0.8 -1.2 v notes: 1 . r q ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. typical r q ja using the board layouts shown below on 4.5"x5" fr-4 pcb in a still air environment : a. 250 o c/w when mounted on a 0.02 in 2 pad of 2 oz copper. b. 270 o c/w when mounted on a 0.001 in 2 pad of 2 oz copper. scale 1 : 1 on letter size paper 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. p d ( t ) = t j - t a r q j a ( t ) = t j - t a r q j c + r q c a ( t ) = i d 2 ( t ) r d s ( o n ) @ t j 1a 1b 4008-318-123 sales@twtysemi.com http://www.twtysemi.com 3 of 3 nds35 6a p smd type smd type smd type smd type smd type smd type smd type smd type smd type smd type product specification
|
